125 lines
4.2 KiB
C
125 lines
4.2 KiB
C
/*********************************************************
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* Copyright (C) 1998-2023 VMware, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation version 2 and no later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*********************************************************/
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/*
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* x86paging_common.h --
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*
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* Contains definitions for the x86 page table layout that are common
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* to legacy and long modes.
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*/
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#ifndef _X86PAGING_COMMON_H_
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#define _X86PAGING_COMMON_H_
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#define INCLUDE_ALLOW_USERLEVEL
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#define INCLUDE_ALLOW_MODULE
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#define INCLUDE_ALLOW_VMMON
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#define INCLUDE_ALLOW_VMK_MODULE
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#define INCLUDE_ALLOW_VMKERNEL
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#define INCLUDE_ALLOW_DISTRIBUTE
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#define INCLUDE_ALLOW_VMCORE
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#include "includeCheck.h"
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#include "vm_basic_types.h"
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/*
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* page tables
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*/
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#define PTE_P 0x00000001
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#define PTE_RW 0x00000002
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#define PTE_US 0x00000004
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#define PTE_PWT 0x00000008
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#define PTE_PCD 0x00000010 // careful: MMU_PTE_EX has same value.
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#define PTE_A 0x00000020
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#define PTE_D 0x00000040
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#define PTE_PS 0x00000080
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#define PTE_PAT 0x00000080
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#define PTE_G 0x00000100
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#define PTE_LARGE_PAT 0x00001000
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#define PTE_NX CONST64(0x8000000000000000)
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#define PTE_NX_SHIFT 63
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#define PTE_PK_MASK CONST64(0x7800000000000000)
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#define PTE_PK_SHIFT 59
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#define PTE_LARGE_PAT_2_PS(_pte) (((_pte) & PTE_LARGE_PAT) >> 5)
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#define PTE_PROT_FLAGS (PTE_P|PTE_RW|PTE_US)
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#define PTE_FLAGS (PTE_PROT_FLAGS|PTE_G)
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#define PTE_KERNEL (PTE_P|PTE_RW)
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#define PTE_KERNEL_NX (PTE_P|PTE_RW|PTE_NX)
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#define PTE_PRESENT(_pte) (((_pte) & PTE_P) != 0)
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#define PTE_WRITEABLE(_pte) (((_pte) & PTE_RW) != 0)
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#define PTE_ACCESS(_pte) (((_pte) & PTE_A) != 0)
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#define PTE_DIRTY(_pte) (((_pte) & PTE_D) != 0)
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#define PTE_USER(_pte) (((_pte) & PTE_US) != 0)
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#define PTE_GLOBAL(_pte) (((_pte) & PTE_G) != 0)
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#define PTE_LARGEPAGE(_pte) (((_pte) & PTE_PS) != 0)
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#define PTE_UNCACHED(_pte) (((_pte) & PTE_PCD) != 0)
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#define PTE_NOEXECUTE(_pte) (((_pte) & PTE_NX) != 0)
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#define PTE_PK(_pte) (((_pte) & PTE_PK_MASK) >> PTE_PK_SHIFT)
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#define PDPTR_MBZ_MASK CONST64(0x1e6)
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#define PK_AD 1 /* Access disable bit */
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#define PK_WD 2 /* Write disable bit */
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#define PKR_WIDTH 2
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#define PKR_MASK 3
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#define PK_RIGHTS(_pkru, _key) (((_pkru) >> ((_key) * PKR_WIDTH)) & PKR_MASK);
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/* Error code flags */
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#define PF_P (1u << 0)
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#define PF_RW (1u << 1)
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#define PF_US (1u << 2)
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#define PF_RSVD (1u << 3)
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#define PF_ID (1u << 4)
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#define PF_PK (1u << 5)
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#define PF_SS (1u << 6)
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#define PF_SGX (1u << 15)
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#define PF_RMP (1u << 31)
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/*
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* Operand definitions for the INVPCID instruction. See SDM Vol. 2A.
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*/
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#define INVPCID_EXTENT_ADDR 0
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#define INVPCID_EXTENT_PCID_CTX 1
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#define INVPCID_EXTENT_ALL_CTX 2
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#define INVPCID_EXTENT_ALL_CTX_LOCAL 3
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#define INVPCID_EXTENT_MAX 3
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#define INVPCID_MAX_PCID 0xfff
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typedef struct {
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uint64 pcid; /* Bits 63:12 reserved. */
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uint64 la; /* Used for single address invalidation. */
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} InvpcidArg;
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typedef enum {
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PM_FLAT, /* non paging mode */
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PM_2_LEVEL, /* classic 32 bit non-pae style paging mode. */
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PM_3_LEVEL, /* classic 32 bit pae style paging mode. */
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PM_4_LEVEL, /* long mode style paging mode (including compat mode). */
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PM_NUM = 4, /* number of different paging modes. */
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} PagingMode;
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#endif /* _X86PAGING_COMMON_H_ */
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