Add RISC-V 64-bit support and builds
Signed-off-by: MichaIng <micha@dietpi.com>
This commit is contained in:
parent
a9bede4444
commit
017e086c1c
|
@ -53,7 +53,7 @@ jobs:
|
|||
|
||||
needs: smoke-tests
|
||||
|
||||
container: ghcr.io/pi-hole/ftl-build:v1.23-${{ matrix.arch }}
|
||||
container: ghcr.io/pi-hole/ftl-build:v1.26-${{ matrix.arch }}
|
||||
|
||||
strategy:
|
||||
fail-fast: false
|
||||
|
@ -81,6 +81,8 @@ jobs:
|
|||
bin_name: pihole-FTL-armv8-linux-gnueabihf
|
||||
- arch: aarch64
|
||||
bin_name: pihole-FTL-aarch64-linux-gnu
|
||||
- arch: riscv64
|
||||
bin_name: pihole-FTL-riscv64-linux-gnu
|
||||
|
||||
env:
|
||||
CI_ARCH: ${{ matrix.arch }}${{ matrix.arch_extra }}
|
||||
|
|
|
@ -29,6 +29,9 @@ int check_one_struct(const char *struct_name, const size_t found_size, const siz
|
|||
#elif defined(__arm__)
|
||||
const size_t expected_size = size32;
|
||||
const char *arch = "arm";
|
||||
#elif defined(__riscv) && __riscv_xlen == 64
|
||||
const size_t expected_size = size64;
|
||||
const char *arch = "riscv64";
|
||||
#else
|
||||
const size_t expected_size = 0;
|
||||
const char *arch = NULL;
|
||||
|
|
|
@ -147,6 +147,12 @@ elif [[ "${CI_ARCH}" == "armv8a" ]]; then
|
|||
check_CPU_arch "v8"
|
||||
check_FP_arch "VFPv3-D16"
|
||||
|
||||
elif [[ "${CI_ARCH}" == "riscv64" ]]; then
|
||||
|
||||
check_machine "ELF64" "RISC-V"
|
||||
check_libs "[libm.so.6] [libc.so.6] [ld-linux-riscv64-lp64d.so.1]"
|
||||
check_file "ELF 64-bit LSB pie executable, UCB RISC-V, RVC, double-float ABI, version 1 (SYSV), dynamically linked, interpreter /lib/ld-linux-riscv64-lp64d.so.1, for GNU/Linux 4.15.0, with debug_info, not stripped"
|
||||
|
||||
else
|
||||
|
||||
echo "Invalid job ${CI_ARCH}"
|
||||
|
|
Loading…
Reference in New Issue